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Semiconductor Engineering
semiengineering.com > 3d-printing-to-create-spatially-freeform-nanomaterial-based-electronics-rice-u-of-utah-nus

3D Printing To Create Spatially Freeform, Nanomaterial-based Electronics (Rice, U. of Utah, NUS)

3D Printing To Create Spatially Freeform, Nanomaterial-based Electronics (Rice, U. of Utah, NUS)1+ hour, 21+ min ago   (518+ words) Researchers from Rice University, University of Utah and National University of Singapore (NUS) published "Three-dimensional printing of nanomaterials-based electronics with a metamaterial-inspired near-field electromagnetic structure." Abstract "Three-dimensional (3D) printing can create freeform architectures and electronics with unprecedented versatility. However, the full…...

Semiconductor Engineering
semiengineering.com > silicon-photonics-in-the-data-center-what-a-cmos-exec-needs-to-know

Silicon Photonics In The Data Center: What A CMOS Exec Needs To Know

Silicon Photonics In The Data Center: What A CMOS Exec Needs To Know14+ hour, 4+ min ago   (626+ words) Figure 1: Google Jupiter Network for multi-thousand Ironwood TPU clusters. Source: Google Refresher for new readers: Figure 2: Total optical components market. Sources: OMDIA & CignalAI Optical components consist of: Figure 3: A Single-Mode Fiber cable " the actual fiber is 8-9mm diameter of a 2-3mm cable…...

Semiconductor Engineering
semiengineering.com > chip-industry-technical-paper-roundup-feb-9

Chip Industry Technical Paper Roundup: Feb. 9

Chip Industry Technical Paper Roundup: Feb. 914+ hour, 4+ min ago   (145+ words) Scalable quantum photonics; scheduling multicore architectures; HW triggered backdoors; performance model for photonic IMC; 300mm fab-compatible planar 2D FETs; thermal characterization power semiconductor packages; overview of Interface dipole engineering; next-gen DRAM capacitors. The post Chip Industry Technical Paper Roundup: Feb. 9 appeared first…...

Semiconductor Engineering
semiengineering.com > research-bits-feb-9

Research Bits: Feb. 9

Research Bits: Feb. 914+ hour, 5+ min ago   (278+ words) Computing with heat; observing TMDC crystal growth; fiber chip. Researchers from the Massachusetts Institute of Technology (MIT) designed silicon structures that can perform calculations in an electronic device using excess heat instead of electricity. Input data is encoded as a…...

Semiconductor Engineering
semiengineering.com > rutile-tio2-as-a-post-zro2-dielectric-platform-for-next-gen-dram-capacitors-kist

Rutile TiO2 As A Post-ZrO2 Dielectric Platform for Next-Gen DRAM Capacitors (KIST)

Rutile TiO2 As A Post-ZrO2 Dielectric Platform for Next-Gen DRAM Capacitors (KIST)2+ day, 3+ hour ago   (303+ words) Rutile TiO2 As A Post-ZrO2 Dielectric Platform for Next-Gen DRAM Capacitors (KIST)Semiconductor Engineering Rutile TiO2 As A Post-ZrO2 Dielectric Platform for Next-Gen DRAM Capacitors (KIST) Researchers at Korea Institute of Science and Technology (KIST) published "Beyond ZrO2: Rutile TiO2 as the Dielectric Platform…...

Semiconductor Engineering
semiengineering.com > thermal-characterization-for-power-semiconductor-packages-katech

Thermal Characterization For Power Semiconductor Packages (KATECH)

Thermal Characterization For Power Semiconductor Packages (KATECH)3+ day, 45+ min ago   (162+ words) Researchers from Korea Automotive Technology Institute published "Analytical Extraction of Thermal Resistance in Power Semiconductors Using Structural Function Derivatives and Series Resistance Modeling." Abstract "Junction-to-case thermal resistance (RthJC ) is a critical parameter for assessing the reliability and thermal performance of…...

Semiconductor Engineering
semiengineering.com > overview-of-interface-dipole-engineering-formation-mechanisms-control-methods-and-emerging-applications-snu-sejong-u

Overview of Interface Dipole Engineering: Formation Mechanisms, Control Methods, And Emerging Applications (SNU, Sejong U.)

Overview of Interface Dipole Engineering: Formation Mechanisms, Control Methods, And Emerging Applications (SNU, Sejong U.)3+ day, 1+ hour ago   (279+ words) Researchers at Seoul National University and Sejong University published "Interface dipole modulation for gate dielectrics in Field-Effect transistors: a review." Abstract "Interface dipole engineering has recently become a key technology in the fabrication of semiconductor FETs. This review comprehensively covers…...

Semiconductor Engineering
semiengineering.com > comprehensive-system-level-performance-model-for-psram-based-in-memory-computing

Comprehensive System-Level Performance Model For p-SRAM-Based IMC (USC, UW-Madison)

Comprehensive System-Level Performance Model For p-SRAM-Based IMC (USC, UW-Madison)3+ day, 1+ hour ago   (113+ words) Researchers at USC and University of Wisconsin-Madison published "System-Level Performance Modeling of Photonic In-Memory Computing." Abstract "Photonic in-memory computing is a high-speed, low-energy alternative to traditional transistor-based digital computing that utilizes high photonic operating frequencies and bandwidths. In this work,…...

Semiconductor Engineering
semiengineering.com > chip-industry-week-in-review-124

Chip Industry Week in Review

Chip Industry Week in Review3+ day, 14+ hour ago   (549+ words) Intel's GPU push; strong M&A; Lam-CEA deal; AI workload fundings; Z-Angle memory; TSMC 3nm in Japan; improving chip power delivery; Arm's expanded startup program; sleeper agent-style backdoors; VR for hiring; IC talent survey. Earnings reports this week: Arm, AMD, Infineon,…...

Semiconductor Engineering
semiengineering.com > securing-hardware-for-the-quantum-era

Securing Hardware For The Quantum Era

Securing Hardware For The Quantum Era4+ day, 8+ hour ago   (320+ words) Quantum computers may become a security threat as early as next year, and that threat will continue to grow over the next several years. Quantum computers that can break current encryption are expected to begin showing up sometime between next…...